KDP categories · Top KDP authors

VLSIDecoded VLSI: Amazon KDP author data

As of Nov 6, 2026, VLSIDecoded VLSI has 10 books on Amazon, 5 of them on a best-seller list in the last 30 days (best rank #27), mostly in Digital Design, Semiconductors, Circuits.

10Books on Amazon
5Listed in 30 days
-Average rating
Median price$12
Price range (middle 50%)$12 – $12
Median reviews-
Total reviews0
New books (30 days)5
Breakout books (30 days)4

View on Amazon

What stands out

  • 50% of the catalog made a best-seller list in the last 30 days: the whole backlist sells, not one hit.
  • Median price $12, 25% above the median of their main category, Digital Design.
  • 5 new books in the last 30 days, 4 of them broke into a Best Sellers list.

VLSIDecoded VLSI's best-ranked books

  1. ASIC Power Integrity and IR-Drop Analysis: Power Delivery Networks, Static and Dynamic Vol book cover by VLSIDecoded VLSI

    ASIC Power Integrity and IR-Drop Analysis: Power Delivery Networks, Static and Dynamic Voltage Drop, and Sign-Off (ASIC Design Guides)

    by VLSIDecoded VLSI

    • Price$12
    • Reviews-

    View on Amazon · Full data on KDPTop

  2. ASIC Design for Testability: Scan Architecture, ATPG, and BIST: From Test Access to Silico book cover by VLSIDecoded VLSI

    ASIC Design for Testability: Scan Architecture, ATPG, and BIST: From Test Access to Silicon Diagnosis (ASIC Design Guides)

    by VLSIDecoded VLSI

    • Price$12
    • Reviews-

    View on Amazon · Full data on KDPTop

  3. ASIC Static Timing Analysis with PrimeTime: Concepts, Constraints, and Timing Closure (ASI book cover by VLSIDecoded VLSI

    ASIC Static Timing Analysis with PrimeTime: Concepts, Constraints, and Timing Closure (ASIC Design Guides)

    by VLSIDecoded VLSI

    • Price$12
    • Reviews-

    View on Amazon · Full data on KDPTop

  4. ASIC Clock Tree Synthesis and Optimization: Clock Networks, Timing Closure, and Physical I book cover by VLSIDecoded VLSI

    ASIC Clock Tree Synthesis and Optimization: Clock Networks, Timing Closure, and Physical Implementation (ASIC Design Guides)

    by VLSIDecoded VLSI

    • Price$12
    • Reviews-

    View on Amazon · Full data on KDPTop

  5. Formal Equivalence Checking for ASIC Design: RTL-to-Gate Verification, Sequential Proof, a book cover by VLSIDecoded VLSI

    Formal Equivalence Checking for ASIC Design: RTL-to-Gate Verification, Sequential Proof, and Debugging (ASIC Design Guides)

    by VLSIDecoded VLSI

    • Price$0
    • Reviews-
    • Published2026-10

    View on Amazon · Full data on KDPTop

  6. ASIC Back-End Timing Verification & Physical ECO Implementation: Sign-Off Analysis and Eng book cover by VLSIDecoded VLSI

    ASIC Back-End Timing Verification & Physical ECO Implementation: Sign-Off Analysis and Engineering Change Orders (ASIC Design Guides)

    by VLSIDecoded VLSI

    • Price$0
    • Reviews-
    • Published2026-10

    View on Amazon · Full data on KDPTop

  7. ASIC Design Flow: From RTL to Sign-Off: Synthesis, Verification, Physical Design, and Test book cover by VLSIDecoded VLSI

    ASIC Design Flow: From RTL to Sign-Off: Synthesis, Verification, Physical Design, and Test (ASIC Design Guides)

    by VLSIDecoded VLSI

    • Price$0
    • Reviews-
    • Published2026-10

    View on Amazon · Full data on KDPTop

  8. ASIC Power Analysis & Low Power Design with UPF: From Fundamentals to Practice (ASIC Desig book cover by VLSIDecoded VLSI

    ASIC Power Analysis & Low Power Design with UPF: From Fundamentals to Practice (ASIC Design Guides)

    by VLSIDecoded VLSI

    • Price$8.99
    • Reviews-

    View on Amazon · Full data on KDPTop

  9. ASIC Signal Integrity with PrimeTime SI: Crosstalk, Noise, Timing Closure, and Physical-De book cover by VLSIDecoded VLSI

    ASIC Signal Integrity with PrimeTime SI: Crosstalk, Noise, Timing Closure, and Physical-Design Sign-Off (ASIC Design Guides)

    by VLSIDecoded VLSI

    • Price$0
    • Reviews-
    • Published2026-10

    View on Amazon · Full data on KDPTop

  10. ASIC Built-In Self-Test: Scan Chains, Memory & Logic Test: Architecture, Diagnosis, and Ve book cover by VLSIDecoded VLSI

    ASIC Built-In Self-Test: Scan Chains, Memory & Logic Test: Architecture, Diagnosis, and Verification (ASIC Design Guides)

    by VLSIDecoded VLSI

    • Price$0
    • Reviews-
    • Published2026-10

    View on Amazon · Full data on KDPTop

Main categories

FAQ

How many books does VLSIDecoded VLSI have on Amazon?

KDPTop tracks 10 of their books; 5 made an Amazon list in the last 30 days.

Which categories does VLSIDecoded VLSI publish in?

Their books chart most often in Digital Design, Semiconductors, Circuits.

How does VLSIDecoded VLSI price their books?

The median price is $12; half of the books cost $12–$12.

Has VLSIDecoded VLSI released new books recently?

5 new books in the last 30 days, 4 of which reached a Best Sellers list.

About this data

Data comes from KDPTop's daily crawl of Amazon's public Best Sellers pages; medians use the latest list. The opportunity score (0–100, higher is easier to enter) combines the review barrier, the share of low-review books, list turnover, new-release share and price.